KiCad Tools

Add a trace segment between two points. Args: x1: Start X y1: Start Y x2: End X y2: End Y width: Trace width in mm layer: Copper layer (e.g. "F.Cu", "B.Cu") net: A net number from list_pcb_nets, or 0 for no net. Any other number is refused and nothing is written, and so is every number but 0 on a board in KiCad 9's format or older that has no net table. A KiCad 10 board holds nets by name and its numbers are derived from where each net first appears, so read list_pcb_nets again after an edit. pcb_path: Path to .kicad_pcb file. Op…

Add a via at a position. Args: x: X position y: Y position size: Via pad size in mm drill: Drill diameter in mm net: A net number from list_pcb_nets, or 0 for no net. Any other number is refused and nothing is written, and so is every number but 0 on a board in KiCad 9's format or older that has no net table. A KiCad 10 board holds nets by name and its numbers are derived from where each net first appears, so read list_pcb_nets again after an edit. layers: Via layers (default: ["F.Cu", "B.Cu"]) pcb_path: Path to .kicad_pcb file. Opti…

Add multiple wires at once, as KiCad's wire tool adds them. Each wire dict has keys: x1, y1, x2, y2. Following SCH_LINE_WIRE_BUS_TOOL::finishSegments (sch_line_wire_bus_tool.cpp:1168-1276 at 9.0.8): a junction goes wherever three or more wire directions, pins or sheet pins meet, at a new wire's end or at a point already on the sheet that a new wire runs through (a pin, a wire end), and every wire through a junction is split there, so a T, or a wire drawn through a pin, joins in every reader. As KiCad merges the new wire with the collinear wires of its stroke that it overlaps or meets end to e…

Auto-assign reference designators to unannotated components. Finds components with '?' in their reference (e.g. R?, U?) and assigns sequential numbers, respecting existing references in the schematic and across the hierarchy when project_path is provided. Args: schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default. project_path: Path to .kicad_pro file (scans hierarchy for existing refs)

Place a decoupling capacitor and wire it to power/ground nets. Places the cap, wires pin 1 (top) to power_net and pin 2 (bottom) to ground_net via stub wires + labels. Args: lib_id: Cap symbol (e.g. "Device:C") reference: Reference (e.g. "C5") value: Cap value (e.g. "100nF") x: X position y: Y position power_net: Label for pin 1 (e.g. "VCC", "+3V3") ground_net: Label for pin 2 (e.g. "GND", "PGND") rotation: Rotation in degrees (default 0) symbol_lib_path: Path to a .kicad_sym file that defines the capacitor, for a library outside KiCad's stock set.…

Autoroute PCB traces using the Freerouting autorouter. Exports the board to Specctra DSN format, runs Freerouting for automated trace routing, and imports the results into a new PCB file. The original board is never modified. Requires KiCad's pcbnew Python bindings, whose major version has to match the board's format era, and Java 25+ for the Freerouting build it downloads. Unless FREEROUTING_JAR names a Freerouting jar, the first run downloads Freerouting 2.5.0 (65 MB) from GitHub, checks its SHA-256 and caches it. Args: pcb_path: Path to .kicad_pcb file. Optional; omit to use the conf…

Check if placing/moving a footprint to (x, y) would violate constraints. Both checks are on the footprint's origin point, not its courtyard, so a footprint whose body overlaps a keep-out while its origin does not still reports ok. That is also why there is no rotation parameter: rotating about the origin cannot move the origin, so an angle could not change either answer. Keep-outs are read as KiCad reads them: a footprint's own keep-outs in board coordinates, as the file stores them; a layer set such as *.Cu or F&B.Cu as the layers it names; the footprint on its side, B.Cu or else F.Cu, as K…

Connect two component pins with Manhattan (L-shaped) wire routing. Combines get_pin_positions + coordinate math + add_wires into one call. At its own points (both pins and the L's corner) a junction goes where three or more directions meet, and any wire through it is split there, as KiCad's wire tool does (sch_line_wire_bus_tool.cpp:1263-1267 at 9.0.8); a leg running through a junction or a bus entry end already on the sheet is split there too, as KiCad's cleanup splits it. The result names each junction and split. Args: ref1: First component reference (e.g. "U1") pin1: First pin nam…

Create a KiCad 9 project (.kicad_pro + root .kicad_sch). No .kicad_prl is written, and an existing .kicad_sch or .kicad_prl of that name is left as it is; the result says whether the root schematic was created or kept. Args: directory: Directory to create the project in (created if missing) name: Project name (used for filenames)

Create a valid empty KiCad 9 schematic file. Args: schematic_path: Path for the new .kicad_sch file. Optional; omit to use the configured default.

Create a sym-lib-table file in the given directory. Each entry dict needs 'name' (the library nickname) and 'uri' (its path, usually "${KIPRJMOD}/..."). Overwrites existing sym-lib-table if present. A backslash in a uri is written as '/', as KiCad stores it. The whole list is checked first. An entry that cannot be written as given refuses the call, names the entry, and leaves any existing table as it was: an empty name; a name holding a character below U+0020, a backslash or a colon (a library nickname cannot); a name an earlier entry has; an empty uri; a double quote in a name or uri, or a …

Create a valid empty KiCad 9 symbol library. Args: symbol_lib_path: Path for the new .kicad_sym file. Optional; omit to use the configured default.

Duplicate a hierarchical sheet, copying the child file with new UUIDs. The new block is a copy of the source block, moved to its right, with its fields placed again when the source's were autoplaced, and its page the lowest number no sheet uses, stored at the parent's path where KiCad reads it. The copied file's symbols get references of their own, so the two sheets are two sets of parts: each prefix takes its first free number across the hierarchy, in the order of the symbols' x then y position, and the units of one part keep one reference. A reference with no number stays as it is. A sourc…

Export PCB 3D model or render 3D view to image. `render` fills width, height and side; the mesh formats leave them unset. Args: format: Output format - "step", "stl", "glb", or "render" (PNG image) pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default. output_dir: Output directory. Optional; omit to use the configured default. width: Image width in pixels (render only) height: Image height in pixels (render only) side: View side: top, bottom, left, right, front, back (render only) quality: Render quality: basic, high (render only)

Export Bill of Materials (BOM) as CSV. Args: schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default. output_dir: Output directory. Optional; omit to use the configured default.

Export footprint to SVG. Args: footprint_path: Path to a .kicad_mod file, or a .pretty library directory. Optional; omit to use the configured default. output_dir: Output directory. Optional; omit to use the configured default.

Export Gerber files for manufacturing. When layers contains exactly one layer, exports a single Gerber file: path names it, and size_bytes and layer are filled. Otherwise exports all layers (or the specified subset) plus optional drill files, and path names the output directory. files and count are filled either way. Args: pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default. output_dir: Output directory for gerber files. Optional; omit to use the configured default. include_drill: Also export drill files (default: True, ignored in single-layer mode) …

Export a netlist from the root schematic, including hierarchy info. Runs kicad-cli to generate a netlist and returns parsed component/net data with sheet path information for each component. Args: schematic_path: Path to root .kicad_sch file. Optional; omit to use the configured default. output_dir: Directory for netlist output (defaults to schematic directory). Optional; omit to use the configured default.

Export PCB in IPC-2581 format for manufacturing data exchange. Args: pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default. output: Output file path. Optional; omit to write <board name>.xml to the configured output directory, or beside the board when none is configured. precision: Numeric precision (default: 3) compress: Compress output file version: IPC-2581 version (default: "C") units: Output units - "mm" or "in"

Export a schematic netlist. Args: schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default. output_dir: Output directory. Optional; omit to use the configured default. format: Netlist format. spice and spicemodel produce simulator input.

Export PCB to PDF, SVG, or DXF format. Args: format: Output format - "pdf", "svg", or "dxf" pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default. output_dir: Directory for output files. Optional; omit to use the configured default. layers: Optional list of layer names to include (required for DXF) output_units: DXF output units - "in" or "mm" (DXF only) exclude_refdes: Exclude reference designators (DXF only) exclude_value: Exclude component values (DXF only) use_contours: Use board outline contours (DXF only) include_border_title…

Export component position file (pick and place) as CSV, in millimetres (mm). The columns are Ref, Val, Package, PosX, PosY, Rot and Side. PosX and PosY are the footprint's position in millimetres, with the board's Y axis negated; Rot is its angle in degrees; Side is top or bottom. Args: pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default. output_dir: Output directory. Optional; omit to use the configured default.

Export schematic to PDF, SVG, or DXF format. pdf and dxf produce one file, so path names it and size_bytes is filled. svg produces one file per sheet, so path names the directory. files and count are filled either way. Args: format: Output format - "pdf", "svg", or "dxf" schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default. output_dir: Directory for output files. Optional; omit to use the configured default.

Export symbol library to SVG images. Args: symbol_lib_path: Path to .kicad_sym file. Optional; omit to use the configured default. output_dir: Output directory. Optional; omit to use the configured default.

Fill all copper zones on the board using pcbnew's zone filler. pcbnew computes the fill; this server writes it. The board is handed to pcbnew read-only and the computed polygons come back as data, so the file that reaches the disk is the original with its zones' fills replaced and every other byte untouched. Nothing else about it changes: not its format version, not its layer names, not the constructs pcbnew does not model. Requires KiCad's pcbnew Python bindings to be installed. Args: pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default.

Flatten a hierarchical schematic into a single sheet whose netlist is the hierarchy's. The flat file is the root schematic with each sub-sheet's content copied below it, one cell per use of a sheet file (a file used twice is copied twice). Each part keeps the reference and unit KiCad reads for it at its sheet's path. A sheet pin becomes a local label at its place when its sheet has a hierarchical label of its name, and nothing otherwise. A local or hierarchical label of a sub-sheet becomes a local label named after the sheet's path, so nets keep their joins and no others; net names change to …

Get board summary: footprint count, trace count, net count, thickness. The net count includes the unconnected net, as KiCad's own count does. Args: pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default.

Get the board-coordinate bounding box of a placed footprint. Args: reference: Footprint reference designator pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default.

Get pad and outline details for a footprint .kicad_mod file. Args: footprint_path: Path to .kicad_mod file. Optional; omit to use the configured default.

Get pad info for a placed footprint on the PCB. Args: reference: Footprint reference (e.g. "R1", "U1") pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default.

Find all component pins connected to a net label. Scans labels matching the text, traces wires from label positions, and identifies component pins at wire endpoints. Each placed symbol contributes only its own unit's pins, so a multi-unit part does not report a sibling gate's input as sitting on this net. Args: label_text: Net name to search for (e.g. "VCC", "GND") schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

Get absolute pin positions for a placed component (accounts for rotation/mirror). A multi-unit part is placed as one symbol per unit and they all share the reference, so every placed unit is listed, each with its own pins plus the unit-0 pins they all share. Args: reference: Component reference (e.g. "U1", "R1") schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

Get schematic page info and item counts. Args: schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

Get detailed info about a hierarchical sheet including pin/label matching. Args: sheet_uuid: UUID of the sheet schematic_path: Path to parent .kicad_sch. Optional; omit to use the configured default.

Get detailed pin and property info for a symbol in a library. Args: symbol_name: Symbol name (e.g. "LM7805") symbol_lib_path: Path to .kicad_sym file. Optional; omit to use the configured default.

List all symbol instances from a root schematic's symbolInstances table. Args: schematic_path: Path to root .kicad_sch file. Optional; omit to use the configured default.

Get pin info for a symbol in the schematic's lib_symbols. Args: symbol_name: Symbol name (e.g. "LM7805", "C", "Fuse") schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

Get KiCad version information including build details and library versions.

Check if a schematic is the root or a sub-sheet. A sheet is found in its project wherever its file sits below the project's folder. A file that no sheet of its project uses is a root. For a sub-sheet, root_path is the top-level sheet of its project that holds it. Args: schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

List all nets that cross sheet boundaries (hierarchical pins and global labels). Args: schematic_path: Path to root .kicad_sch file. Optional; omit to use the configured default.

List the full sheet hierarchy starting from a root schematic. Args: schematic_path: Path to root .kicad_sch file. Optional; omit to use the configured default.

List all footprints in a .pretty library directory. Args: pretty_dir: Path to .pretty directory containing .kicad_mod files

List all symbols in a .kicad_sym library file. Args: symbol_lib_path: Path to .kicad_sym file. Optional; omit to use the configured default.

List all footprints on the PCB. Args: pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default.

List all graphic items (lines, text, etc.) on the PCB. Args: pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default.

List all layers defined in the PCB stackup: copper, silkscreen, soldermask, solder paste, courtyard, fabrication, and the board outline. Which of those a given board actually defines is up to the board. Call this before any tool that takes a layer name, since the valid set is per-board and renamed layers are common. Args: pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default.

List all named nets on the PCB. Args: pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default.

List all trace segments and vias on the PCB. Args: pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default.

List all zones (copper and keepout) on the PCB. Args: pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default.

List all bus entries in the schematic. Args: schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

List all placed components in the schematic. Args: schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

List all global labels in the schematic. Args: schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

List all hierarchical labels in the schematic. Args: schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

List all junctions in the schematic. Args: schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

List all net labels in the schematic. Args: schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

List all no-connect flags in the schematic. Args: schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

List all hierarchical sheets in the schematic. Args: schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

List all wire segments in the schematic. Args: schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

List unconnected pins by running ERC and filtering results. Requires kicad-cli. Lists the violations KiCad types pin_not_connected. A sub-sheet is checked from its project's root, as run_erc does, and gets the pins of that sheet alone, under every top-level sheet the project lists. A sheet below a top-level sheet other than the root is refused when that kicad-cli did not check it from the root. A run that makes no report raises and leaves output_dir as it was. The x and y of each entry are millimetres (mm) in sheet coordinates, the numbers get_pin_positions prints. Args: schematic_path:…

Modify an existing hierarchical label. Args: text: Current label text to find schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default. new_text: New label text (empty = keep current) new_shape: New shape/direction (empty = keep current) new_x: New X position (None = keep current) new_y: New Y position (None = keep current) uuid: UUID for disambiguation

Modify properties of an existing hierarchical sheet block. A new width or height keeps each pin on its edge and moves it with the edge, places the name and file fields of an autoplaced sheet again, and moves a wire, bus end or no-connect that sat on a moved pin with it, so the sheet stays connected. A size smaller than the sheet's pins need is refused, naming the minimum, and a size equal to the current one changes nothing. Args: sheet_uuid: UUID of the sheet to modify (from list_schematic_sheets) schematic_path: Path to parent .kicad_sch. Optional; omit to use the configured default…

Move a placed component, turn it, or both. The symbol and all its fields move together: each field keeps its place relative to the symbol, rotation included, and keeps its own text angle, so KiCad draws it turning with the symbol. KiCad's GUI would also re-place auto-placed fields after a turn when its autoplace preference is on; this tool does not. Wires, labels, junctions and no-connect flags stay where they are, as with KiCad's own Move. The result lists every pin whose connections changed (what it left, what it now meets); reconnect those with wire_pins_to_net or connect_pins. x and y s…

Move a footprint to a new position. A move rewrites the footprint's own position and nothing of its pads, texts or graphics, which KiCad stores relative to the footprint. The zones it owns and a KiCad 10 footprint's points are stored in board coordinates, so they move by the same delta, as KiCad's FOOTPRINT::SetPosition moves them (pcbnew/footprint.cpp:2553-2584 at 9.0.8). A rotation turns the footprint to that angle as KiCad's own rotate turns it: every pad and text turns by the change from the angle it had, its zones and points turn about it, and a keep-upright text that would read upside d…

Move a hierarchical sheet block to a new position, including all pins. Args: sheet_uuid: UUID of the sheet to move new_x: New X position in mm new_y: New Y position in mm schematic_path: Path to parent .kicad_sch. Optional; omit to use the configured default.

Place a no-connect flag on a component pin. Resolves pin position and places a no-connect flag. Idempotent: calling again for a pin that already has one is a no-op. Args: reference: Component reference (e.g. "U2") pin_name: Pin name (e.g. "NC") or number (e.g. "3") schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

Place a schematic symbol: resistor, capacitor, inductor, diode, LED, transistor, crystal, switch, connector, or an IC such as a microcontroller or regulator chip. Any lib_id in a library works. Args: lib_id: Library identifier (e.g. "Device:R", "Device:C", "MyLib:MyPart") reference: Reference designator (e.g. "R1", "U1") value: Component value (e.g. "10K", "100nF") x: X position in schematic units (mm) y: Y position in schematic units (mm) rotation: Rotation angle in degrees (0, 90, 180, 270) symbol_lib_path: Path to a .kicad_sym file that defines the symbol, for a…

Place a footprint on the PCB. Name a library and a footprint to place the real thing: its pads, silkscreen, courtyard and 3D model are copied from the library file exactly as KiCad would place them, a footprint in KiCad 7's form taking the reference and value in its own (fp_text reference|value ...), where one holding %V or %R, which KiCad reads there as a variable, is refused. Without them you get a marker carrying only the reference and value, which has NO PADS and so cannot be routed or checked; that is the older behaviour and it is kept for callers that only want a placeholder. Use list_…

Remove a component by reference designator. Args: reference: Reference designator to remove (e.g. "U2") schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

Detect and remove trace segments with unconnected endpoints. Iteratively removes dangling segments until no more are found. A segment is considered dangling if either endpoint does not connect to a pad, via, or another trace endpoint. Args: pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default.

Remove a footprint by reference designator. Args: reference: Reference designator (e.g. "R1") pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default.

Remove a hierarchical label by name or UUID. Args: text: Label text to match schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default. uuid: Optional UUID for disambiguation when multiple labels share a name

Remove a hierarchical sheet block from a parent schematic. Identify the sheet by name, uuid, or both. If name matches multiple sheets, returns an error with UUIDs for disambiguation. Args: parent_schematic_path: Path to parent .kicad_sch name: Sheet name to match uuid: Sheet UUID for unambiguous identification delete_child_file: If True, delete the child .kicad_sch file (unless still referenced by another sheet)

Remove a junction at the given coordinates, as KiCad's delete removes one. The junction within 0.1 mm goes, with any other at exactly its point. Then, as KiCad's DeleteJunction does (bus-wire-junction.cpp:115-185 at 9.0.8), of the wires and buses ending there each parallel pair is made one, or one of two identical lines goes, so whatever met only at the junction is disconnected: a T loses its stem, a crossing becomes two wires that do not join. Wires that merely meet there at an angle stay joined. Where a bus entry ends at the point nothing is merged, since kicad-cli 9 cuts a wire at a bus en…

Remove net label(s) or global label(s) by text, optionally filtered by position. If x and y are provided, only removes labels matching both text AND position (within 0.1mm tolerance). Otherwise removes ALL labels with matching text. To move a global label, remove it and re-add with add_global_label (which takes shape and rotation). Args: text: Label text to match (e.g. "VCC", "PGND") x: Optional X position filter y: Optional Y position filter schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

Remove no-connect flag(s) from a component pin. Removes every no-connect at the pin's position, so stacked duplicates from repeated no_connect_pin calls clear in one go. Args: reference: Component reference (e.g. "U2") pin_name: Pin name (e.g. "NC") or number (e.g. "3") schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

Remove a pin from a hierarchical sheet block. Args: sheet_uuid: UUID of the sheet pin_name: Name of the pin to remove schematic_path: Path to parent .kicad_sch. Optional; omit to use the configured default.

Remove text annotation(s) by content, optionally filtered by position. If x and y are provided, only removes texts matching both content AND position (within 0.1mm tolerance). Otherwise removes ALL texts with matching content. Args: text: Text content to match x: Optional X position filter y: Optional Y position filter schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

Remove trace segments matching the given filters. Does not remove vias. At least one filter (net_name, layer, or bounding box) is required. Args: net_name: Filter by net name layer: Filter by layer name (e.g. "F.Cu", "B.Cu") x_min: Left edge of bounding box filter (mm) y_min: Top edge of bounding box filter (mm) x_max: Right edge of bounding box filter (mm) y_max: Bottom edge of bounding box filter (mm) pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default.

Remove a wire segment by its endpoint coordinates. Matches wires with endpoints within 0.1mm tolerance (in either order). Use list_schematic_wires to get wire coordinates first. Args: x1: Start X y1: Start Y x2: End X y2: End Y schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

Put hierarchical sheets in the page order given: sheets listed come first, in that order, then the others in the order they have now. KiCad orders sheets by their page numbers, not by where their blocks sit in the file, so this rewrites the page numbers and leaves the blocks where they are. Call it on the root schematic: a sheet's page is stored at its parent's path, and a sub-sheet's blocks are refused. The numbers already in use are given back in the new order, so custom labels such as "Intro" stay; when they repeat, or a deeper sheet uses one, the sheets are numbered from the lowest positi…

Run Design Rules Check (DRC) on a PCB. Returns structured report with violations. Args: pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default. output_dir: Directory for report file (default: same as PCB). Optional; omit to use the configured default.

Run Electrical Rules Check (ERC) on a schematic. A sub-sheet is checked from its project's root, so the hierarchy around it counts, and only that sheet's own violations are returned, those of every use of it under every top-level sheet the project lists. A sheet below a top-level sheet other than the root is refused when that kicad-cli did not check it from the root; run_erc on that top-level sheet checks it on its own. A file that no sheet of its project uses is checked on its own. A run that makes no report raises and leaves output_dir as it was. Returns JSON report with violations. An ite…

Run a KiCad jobset file: every output it defines. The jobset runs against the one .kicad_pro in its own folder, and a relative output folder in it is relative to that folder. kicad-cli is given a copy of the jobset, never the file, because it rewrites or deletes a jobset it cannot parse. It is an error when nothing ran or a job failed, and the error carries the counts kicad-cli reported. Args: jobset_path: Path to .kicad_jobset file

Set any property on a placed component, or rename it. Creates the property if it is missing. Reference, Value and Footprint are mirrored into the symbol's own instances and into the root symbol_instances table, so setting key="Reference" is how a component is renamed and both views stay in step. The root table needs the .kicad_pro to resolve the hierarchy path; a loose .kicad_sch with no project beside it keeps the symbol correct and leaves that table alone. Args: reference: Component reference (e.g. "R1") key: Property name (e.g. "MPN", "Tolerance", "Value") value: Property valu…

Create or update a net class with design rules and assign nets. Edits the KiCad project file (.kicad_pro) alongside the board to define the net class and assign nets. Does NOT require pcbnew. Args: name: Net class name (e.g. "Power", "HighSpeed") nets: List of net names to assign to this class track_width: Track width in mm (None = use default) clearance: Clearance in mm (None = use default) via_size: Via diameter in mm (None = use default) via_drill: Via drill in mm (None = use default) pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured defa…

Set the schematic page/sheet size. Args: size: Standard name (A5, A4, A3, A2, A1, A0, A, B, C, D, E) or 'User' for custom width: Custom width in mm (required when size='User') height: Custom height in mm (required when size='User') portrait: If True, swap width/height for portrait orientation schematic_path: Path to .kicad_sch file. Optional; omit to use the configured default.

Change the width of existing traces matching the given filters. At least one filter (net_name, layer, or bounding box) is required. Args: width: New trace width in mm net_name: Filter by net name layer: Filter by layer name (e.g. "F.Cu", "B.Cu") x_min: Left edge of bounding box filter (mm) y_min: Top edge of bounding box filter (mm) x_max: Right edge of bounding box filter (mm) y_max: Bottom edge of bounding box filter (mm) pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default.

Trace a net across the hierarchy, following hierarchical pins and labels. Args: net_name: Net/label name to trace schematic_path: Path to root .kicad_sch file. Optional; omit to use the configured default.

Update the PCB from the schematic (headless Tools -> Update PCB from Schematic). Exports the schematic's netlist, loads the assigned footprints from libraries, and binds every pad to its net. Creates the .kicad_pcb if it does not exist; new footprints land in a grid cluster at orientation 0, written as KiCad writes a footprint it has just loaded (no angle on the footprint, library pad and text angles normalized as KiCad holds them). Existing footprints are matched by reference and keep their position; a footprint in KiCad 7's form, on the board or from its library, takes the symbol's referenc…

Upgrade a footprint library to current KiCad format. Rewrites every footprint in the library, so this takes the library directory. kicad-cli has no per-footprint option here, and a single .kicad_mod path is rejected. So is a library that is, or holds, a link or anything other than plain files and folders, before anything is copied. KiCad performs the migration, as it should, but it performs it on a copy and each result lands through the server's atomic write, so no footprint file can be left truncated. Only files whose content actually changed are written, so an upgrade that touches three f…

Upgrade a symbol library to current KiCad format. KiCad performs the migration, as it should, but it performs it on a copy: the result lands through the server's atomic write, so your library is replaced whole or not at all and can never be left truncated. A backup is still taken beside it at ``<name>.kicad_sym.bak``, and the result names it, because that is the undo for an upgrade that SUCCEEDED and is not something an atomic write can offer. There is exactly one, and every run overwrites it. Args: symbol_lib_path: Path to .kicad_sym file. Optional; omit to use the configured default.

Validate all footprint placements against keep-out zones and board edge. Each footprint's origin is checked as check_placement checks it: keep-outs read as KiCad reads them, footprint keep-outs in board coordinates and layer sets such as *.Cu included, and a footprint never flagged by its own keep-outs, which KiCad's DRC never tests it against (pcbnew/pcbexpr_functions.cpp:697 at 9.0.8). Args: pcb_path: Path to .kicad_pcb file. Optional; omit to use the configured default.

Validate a hierarchical schematic for common issues. Checks every sheet below the root, however deep, each file once. A relative sheet file name is found beside the file holding the sheet, as KiCad finds it; a sheet that contains itself, which KiCad refuses, is skipped. Per sheet block: orphaned labels and pins, direction mismatches, a missing file, a file that cannot be parsed ("unreadable_file", whose "note" names the file; its checks are skipped, the rest still run). Per sheet instance, so a reused sheet counts once per use: duplicate and unannotated reference designators, each read from t…

Put each listed pin on the net named label_text, or refuse and write nothing. Each pin gets a short wire stub pointing away from its symbol, with a net label at the stub's end. When the stub would touch, overlap or cross anything else on the sheet, or move a net into another net class, the label goes on the pin end itself instead. No junction is ever written, and a pin already on the net is left alone. The file is written once or not at all. The whole call is refused when any pin cannot be wired safely: its net may already carry another name, it may reach something this tool cannot judge (a …